The disclosure relates generally to circuits and methods to backup state information in integrated circuits and more particularly to circuits and methods that save the state of the processor or logic chip and methods for performing same.
Logic chips and processors such as central processing units (CPUs), graphics processing units (GPUs), DSPs and other processing circuits employ known solutions to save the state information that are in various locations throughout the processor when, for example, power is to be shut down on the device or for switching to handle different processing threads or for other suitable purposes. Flip-flops as known in the art may be used in pipelines to store state information and may be used, for example, in state machines or any other suitable structure to allow devices to start and stop when power is to be removed, for example or if a pipeline is to be temporarily held to allow another thread to be processed. Saving the state of the processor can involve the tedious process of reading all of the architected states of the chip (or part of the chip) that is to be powered off and saved out to a section of the chip not to be powered off or power gated. Other solutions utilize the writing of the state of the chip onto a system bus to an off-chip non-volatile storage device that retains the data after power has been removed, such as a ROM disk or other non-volatile storage.
FIG. 1 illustrates one example of a prior art device 100 that employs a chip or system bus 102 that communicate with a non-volatile disk memory 104 (e.g., hard drive) or other storage 106. An integrated circuit chip 108 (e.g., die or packaged die) may be connected to the disk memory 104 via the chip or system bus 102. The integrated circuit chip 108 may include, for example, an input/output stage 110, cache memory 112, register files 114 and one or more execution units 116. Control logic 118 provides control of the various stages to effect processing. Active memory circuits (e.g., that are made from CMOS transistors or other active memory structures) in the form of flip-flops 120, for example, may be used to store information throughout the integrated circuit as well. Other memory circuits such as the register file, as known in the art, may store state elements for computations for the execution unit. The flip-flops 120 store states of the processor and the cache memory 112 may be SRAM cache or other suitable cache. Memory circuits such as flip-flops, registers, register files, SRAM and other memory circuits that store state information can be quite voluminous particularly in complex processors such as CPUs, GPUs and other processors. Memory circuits as used herein include, for example, active memory circuits that employ, for example, active transistors such as CMOS transistors or other suitable active devices. The flip-flops 120 may be connected to scan chains that are used for testing the integrated circuit prior to packaging and may also be used to scan out state information from various circuits in the chip prior to power down as known in the art. The scan chains may typically operate at a low frequency such as 100 MHz and typically scan out state data in a serialized fashion which can take an inordinate amount of time. The state information may be saved onto the non-volatile disk 104. Once stored, power to the section of the chip or system can be removed. This is sometimes referred to as power gating.
To restore the state, the reverse process is executed. The section of the chip, entire chip or system is powered up and the state is restored to its previous state from the save location and execution is resumed from the previous store point. Such state saving techniques can require significant amounts of power to save and restore the state of entire sections of a chip, the entire chip or system. This can defeat the purpose of power gating in an integrated circuit which allows the reduction or removal of power from subsections or portions of the chip to save power when they are not in use or otherwise slow down the operation to conserve power. Such power gating is useful for mobile devices for example. Such power gated integrated circuits may be used, for example, in handheld devices such as smart phones, laptops, tablet devices or any other suitable mobile devices. Energy efficiency is becoming more commonplace in non-mobile devices as well.
It is also known in the art to use shadow flip-flops that are active circuits that are connected to active flip-flops to attempt to save state. However, shadow flip-flops are typically connected to a separate supply voltage to keep the flip-flop on during power gating so that the data is not lost. This results in additional leakage current from the many shadow flip-flops that are employed to save state, drawing unnecessary power and adding unnecessary temperature increases.
Also, known retention circuits require a separate supply that stays powered while the regular supply to the combinational circuits is powered down. A drawback with such an approach includes that the design complexity with the separate power supply. In addition, the circuitry including the retention state circuits typically continue to draw power during power down mode. Accordingly, such solutions may keep entire flops on separate power supplies that do not get powered down or have a separate retention portion (essentially a separate state element) on a separate supply. However, the extra power supply design results in additional costs, additional metal tracks and design effort. In addition, the circuitry that is left powered on typically continue to consume power.
Other solutions may include the saving of state information in active state elements in separate storage such as an off chip memory, non-powered down caches, etc. However, such approaches can significantly lengthen the required time for entering and exiting powered down modes. Other disadvantages will be recognized by those of ordinary skill in the art.
A need exists for an improved state saving circuit, apparatus and method.